Overview

The AO3401 (and improved AO3401A) is a -30V -4.0A P-channel logic-level enhancement mode power MOSFET manufactured by Alpha & Omega Semiconductor. Housed in an industry-standard surface-mount SOT-23 package, it is designed using advanced trench technology to achieve ultra-low on-resistance and low gate charge.

Providing a maximum on-state resistance of just 55 mΩ55\text{ m}\Omega at VGS=4.5VV_{GS} = -4.5\text{V} and fully specified down to VGS=2.5VV_{GS} = -2.5\text{V} (85 mΩ85\text{ m}\Omega), the AO3401 enables high-side switching directly from 3.3V3.3\text{V} or 5V5\text{V} microcontrollers. As the P-channel counterpart to the ubiquitous AO3400, the AO3401 is widely used in battery-powered high-side power distribution switches, USB port power gating, low-loss reverse polarity protection circuits, and DC-DC converter output disconnect stages.

Quick reference

Transistor TypeP-Channel Logic-Level Enhancement Mode MOSFET
PackageSOT-23 (3-pin SMD)
Drain-Source Breakdown Voltage (VDSSV_{DSS})30 V-30\text{ V} max
Gate-Source Voltage (VGSSV_{GSS})±12 V\pm 12\text{ V} max
Continuous Drain Current (IDI_D)4.0 A-4.0\text{ A} (TA=25CT_A = 25^\circ\text{C}) / 3.5 A-3.5\text{ A} (TA=70CT_A = 70^\circ\text{C})
Pulsed Drain Current (IDMI_{DM})30 A-30\text{ A}
On-Resistance (RDS(on)R_{DS(on)} at 10V-10\text{V})44 mΩ44\text{ m}\Omega max (35 mΩ35\text{ m}\Omega typ)
On-Resistance (RDS(on)R_{DS(on)} at 4.5V-4.5\text{V})55 mΩ55\text{ m}\Omega max (43 mΩ43\text{ m}\Omega typ)
On-Resistance (RDS(on)R_{DS(on)} at 2.5V-2.5\text{V})85 mΩ85\text{ m}\Omega max (63 mΩ63\text{ m}\Omega typ)
Gate Threshold Voltage (VGS(th)V_{GS(th)})0.7 V-0.7\text{ V} to 1.3 V-1.3\text{ V} (Sub-2.5V Logic Direct Drive)
Power Dissipation (PDP_D)1.4 Watts1.4\text{ Watts} (TA=25CT_A = 25^\circ\text{C})
Complementary N-Channel PairAO3400 / AO3400A

Pinout (SOT-23 Package)

Looking at the top of the SOT-23 package:

text
           ┌───┴───┐
           │   3   │ ── Pin 3: DRAIN (D)
           │       │
           │ AO3401│
           └──┬─┬──┘
              1 2
       Pin 1: GATE (G)
       Pin 2: SOURCE (S)
PinNameTypeDescription
1GATE (G)Control InputGate terminal (Driven LOW relative to Source to turn ON)
2SOURCE (S)Power TerminalSource terminal (Connected to positive supply rail or battery positive)
3DRAIN (D)Power TerminalDrain terminal (Connected to positive side of the switched load)

Specifications

ParameterSymbolMinTypMaxUnitConditions
Drain-Source BreakdownV(BR)DSSV_{(BR)DSS}-30VID=250 μA,VGS=0VI_D = -250\ \mu\text{A}, V_{GS} = 0\text{V}
Gate Threshold VoltageVGS(th)V_{GS(th)}-0.7-0.9-1.3VVDS=VGS,ID=250 μAV_{DS} = V_{GS}, I_D = -250\ \mu\text{A}
Zero Gate Voltage Drain CurrentIDSSI_{DSS}-1.0µAVDS=24V,VGS=0VV_{DS} = -24\text{V}, V_{GS} = 0\text{V}
Gate-Body Leakage CurrentIGSSI_{GSS}±100\pm 100nAVGS=±12V,VDS=0VV_{GS} = \pm 12\text{V}, V_{DS} = 0\text{V}
Static Drain-Source On-ResistanceRDS(on)R_{DS(on)}3544VGS=10V,ID=4.0AV_{GS} = -10\text{V}, I_D = -4.0\text{A}
Static Drain-Source On-ResistanceRDS(on)R_{DS(on)}4355VGS=4.5V,ID=3.5AV_{GS} = -4.5\text{V}, I_D = -3.5\text{A}
Static Drain-Source On-ResistanceRDS(on)R_{DS(on)}6385VGS=2.5V,ID=2.5AV_{GS} = -2.5\text{V}, I_D = -2.5\text{A}
Total Gate ChargeQgQ_g1114nCVGS=10V,VDS=15V,ID=4.0AV_{GS} = -10\text{V}, V_{DS} = -15\text{V}, I_D = -4.0\text{A}

Typical Application Circuit: Ideal Diode / Reverse-Polarity Battery Protection

Using a P-channel MOSFET in place of a Schottky diode eliminates the 0.3V0.5V0.3\text{V} \dots 0.5\text{V} diode voltage drop, reducing power loss to milliwatts:

text
  +3.7V / +5V Power In ───────► [Pin 2: SOURCE]
                                    AO3401
  Common Ground (0V)   ───────► [Pin 1: GATE]   ───► [Pin 3: DRAIN] ───► Protected +Vout to Circuit

                                               [ 10µF Bypass Cap ]

  Common Ground (0V)   ──────────────────────────────────┴──────────────► Common Ground Return

(When power is connected with correct polarity, VGS=VINV_{GS} = -V_{IN}, turning the channel fully ON with only RDS(on)×IR_{DS(on)} \times I drop. If reverse polarity is connected, VGS>0VV_{GS} > 0\text{V}, remaining safely OFF).

Common mistakes

  • Exceeding the ±12V\pm 12\text{V} Gate-Source (VGSSV_{GSS}) rating: Unlike standard power MOSFETs with ±20V\pm 20\text{V} gate limits, the AO3401 has an absolute maximum VGSV_{GS} limit of ±12V\pm 12\text{V}. When switching supplies above 12V12\text{V} (e.g. 24V rails), use a Zener diode (e.g. 10V) or voltage divider to limit VGSV_{GS}.
  • Reversing Drain and Source: Because power MOSFETs have an intrinsic body diode from Drain to Source, connecting Source to the load and Drain to +VIN+V_{IN} allows current to continuously conduct through the forward-biased body diode even when the gate is turned OFF.

Notes

  • Top Marking Code: AO3401/AO3401A packages are commonly laser-marked with top codes A19T, AO1, or X1DV.

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