Overview

The CD4007 (CD4007UB / CD4007UBE) is a versatile CMOS transistor array IC manufactured by Texas Instruments and onsemi. Housed in a standard 14-pin through-hole DIP-14 package, it consists of three P-channel and three N-channel enhancement-mode MOSFETs on a single monolithic substrate with unbuffered, directly accessible gate, drain, and source terminals.

Operating across an ultra-wide supply voltage range of $3.0\text{V}$ to $18.0\text{V}$ DC with extremely high input impedance ($10^{12}\ \Omega$), the CD4007UB is one of the most famous educational and experimental ICs in electrical engineering. Because the internal transistors can be interconnected flexibly by external jumper wires, it serves as a Swiss-army-knife component for building custom analog operational amplifiers, crystal oscillators, analog transmission gates, current mirrors, differential amplifiers, Schmitt triggers, and unbuffered CMOS inverters.

Quick reference

Internal Transistor Schematic & Pinout (DIP-14)

                            ┌───┴───┐
       (PMOS 1 Drain)   D1 1│ 1   14│ VDD (Positive Supply & PMOS Substrate)
      (PMOS 1 Source)   S1 2│       │13 D3 (PMOS 3 Drain)
       (Common Gate)  G1/2 3│ CD4007│12 D3 (NMOS 3 Drain)
       (NMOS 1 Drain)   D1 4│   UB  │11 S3 (NMOS 3 Source)
      (NMOS 1 Source)   S1 5│ DIP-14│10 G3 (Common Gate 3)
      (Inverter Gate)  G_INV 6│     │9  (Center-notch bottom)
           (Ground)    VSS 7│       │8  OUT_INV (Inverter Common Drain)
                            └───────┘

Transistor Connections Table

(Note: Transistor 2 PMOS Source is internally hardwired to Pin 14 $V_{DD}$, and NMOS Source is hardwired to Pin 7 $V_{SS}$; Transistor 3 PMOS Source is internally hardwired to Pin 14 $V_{DD}$).

Common Circuit Configurations

1. High-Gain Linear Inverting Analog Amplifier

By adding negative feedback across the unbuffered inverter pair, the CD4007 acts as a high-speed linear amplifier:

           ┌──────────[ Feedback: 1MΩ Resistor ]──────────┐
           │                                              │
  Input ───┴───[ 100kΩ ]───► [Pin 6: IN_INV]              │
                              CD4007UB                    ├────► Output
                             [Pin 8: OUT_INV] ────────────┘

2. High-Frequency Crystal Oscillator

  [Pin 6: IN_INV] ───┬───[ Crystal: 32.768kHz - 10MHz ]───┬───► [Pin 8: OUT_INV]
                     │                                    │
               [ 22pF Cap ]                          [ 22pF Cap ]
                     │                                    │
                    GND                                  GND

Common mistakes

• Leaving Pin 14 ($V_{DD}$) or Pin 7 ($V_{SS}$) disconnected: Pin 14 and Pin 7 serve as the bulk substrate bias connections for all internal PMOS and NMOS wells. If they are not connected to the absolute highest and lowest DC voltages in the circuit, substrate parasitic PN diodes will forward bias and cause chip latchup.
• Unused gate pins left floating: As high-impedance CMOS inputs ($10^{12}\ \Omega$), floating gates pick up static charge and cause excessive shoot-through current dissipation between $V_{DD}$ and $V_{SS}$. Tie unused gate pins (Pins 3, 6, 10) to $V_{SS}$ (Ground) or $V_{DD}$.

Notes

• "UB" Suffix: Denotes Unbuffered single-stage CMOS topology, providing linear analog characteristics ideal for amplifiers, active filters, and oscillators compared to buffered (B-series) digital gates.