Overview

The 74HC595 is an 8-bit serial-in, parallel-out shift register with a storage register and 3-state outputs manufactured by Texas Instruments, Nexperia, and STMicroelectronics. It allows microcontrollers to expand 3 digital output pins into 8 (or more when daisy-chained) independent digital outputs.

Containing an 8-bit D-type shift register feeding an 8-bit D-type storage (latch) register, the 74HC595 updates its parallel outputs (QAQ_A–QHQ_H) simultaneously on a latch pulse, avoiding flicker during serial shifting. It is foundational in electronics education and is widely used to drive LED bars, 7-segment displays, relay arrays, and matrix displays on Arduino and Raspberry Pi.

Quick reference

Operating voltage (VCC)2.0 V to 6.0 V DC (5.0 V nominal)
Logic familyHigh-Speed CMOS (74HC family)
Output channels8 parallel outputs (QAQ_A through QHQ_H) + 1 serial cascade output (QH′Q_H')
Max output current±35 mA\pm 35\text{ mA} per pin (±70 mA\pm 70\text{ mA} continuous supply total)
Max clock frequency25 MHz (at 4.5 V / 5.0 V)
Control interface3 Digital Pins: Data (SER), Shift Clock (SRCLK), Latch Clock (RCLK)

Pinout (DIP-16 Package)

text
             ┌───┴───┐
         QB ─┤ 1   16├─ VCC
         QC ─┤ 2   15├─ QA
         QD ─┤ 3   14├─ SER (DS)
         QE ─┤ 4   13├─ OE (Output Enable)
         QF ─┤ 5   12├─ RCLK (Latch)
         QG ─┤ 6   11├─ SRCLK (Clock)
         QH ─┤ 7   10├─ SRCLR (Reset)
        GND ─┤ 8    9├─ QH' (Cascade Out)
             └───────┘
PinNameTypeDescription
1–7, 15QBQ_B–QHQ_H, QAQ_AOutputParallel data outputs 0 through 7 (QAQ_A is Bit 0, QHQ_H is Bit 7)
8GNDPowerGround reference (0 V)
9QH′Q_H'OutputSerial data output for cascading to next shift register
10SRCLRInputActive-Low Shift Register Clear (connect to VCCV_{CC} for normal operation)
11SRCLKInputShift Register Clock Input (rising edge shifts data)
12RCLKInputStorage Register (Latch) Clock Input (rising edge updates parallel outputs)
13OEInputActive-Low Output Enable (connect to GND to enable outputs)
14SER / DSInputSerial Data Input
16VCCPowerPower supply input (+2.0 V to +6.0 V DC)

Specifications

ParameterSymbolMinTypMaxUnitConditions
Supply VoltageVCCV_{CC}2.05.06.0VDC
High-Level InputVIHV_{IH}3.155.0VCCV_{CC}VVCC=4.5 VV_{CC} = 4.5\text{ V}
Low-Level InputVILV_{IL}001.35VVCC=4.5 VV_{CC} = 4.5\text{ V}
Output Source/Sink CurrentIoutI_{out}-35—+35mAPer individual output pin
Supply Current TotalICCI_{CC}-70—+70mAMax total current through VCCV_{CC} / GND
Shift FrequencyfMAXf_{MAX}—3025MHzVCC=4.5 VV_{CC} = 4.5\text{ V}
Propagation Delaytpdt_{pd}—1530nsSRCLK to QH′Q_H' at 4.5 V

Operating Principle & Daisy-Chaining

  1. Serial Shifting: On each rising edge of SRCLK (Shift Register Clock), the logic state present on SER (Serial Data) is shifted into Bit 0, and all previous bits shift one position right (Q0→Q1…Q6→Q7Q_0 \to Q_1 \dots Q_6 \to Q_7).
  2. Latch Transfer: On a rising edge of RCLK (Register Clock / Latch), the 8 bits in the internal shift register are copied into the output storage register, updating pins QAQ_A–QHQ_H simultaneously.
  3. Daisy-Chaining: Connect QH′Q_H' (Pin 9) of Chip 1 to SER (Pin 14) of Chip 2 while sharing SRCLK and RCLK across all chips. Sending 16 clock pulses shifts data across both ICs seamlessly.

Wiring

74HC595 Pin→Arduino UnoESP32Notes
16 (VCC)5V3.3VDecoupling cap 0.1 μF0.1\ \mu\text{F} required
8 (GND)GNDGNDSystem ground
10 (SRCLR)5V / VCCV_{CC}3.3VTie High to disable auto-clear
13 (OE)GNDGNDTie Low to enable outputs
14 (SER)Digital D11 (Data Pin)GPIO 23Serial Data
12 (RCLK)Digital D8 (Latch Pin)GPIO 5Storage Register Latch Clock
11 (SRCLK)Digital D13 (Clock Pin)GPIO 18Shift Register Clock

Example

cpp
const int dataPin = 11;   // SER (Pin 14)
const int latchPin = 8;   // RCLK (Pin 12)
const int clockPin = 13;  // SRCLK (Pin 11)

void setup() {
  pinMode(latchPin, OUTPUT);
  pinMode(clockPin, OUTPUT);
  pinMode(dataPin, OUTPUT);
}

void loop() {
  // Light LEDs one by one in a binary counter pattern
  for (int numberToDisplay = 0; numberToDisplay < 256; numberToDisplay++) {
    digitalWrite(latchPin, LOW);
    shiftOut(dataPin, clockPin, MSBFIRST, numberToDisplay);
    digitalWrite(latchPin, HIGH);
    delay(100);
  }
}

Common mistakes

  • Leaving SRCLR (Pin 10) floating: If left un-connected, electrostatic noise triggers internal clears, setting all outputs to 0 randomly. Tie Pin 10 to VCCV_{CC}.
  • Leaving OE (Pin 13) floating: If left un-connected, outputs enter a high-impedance tri-state mode. Tie Pin 13 to GND.
  • Exceeding 70 mA70\text{ mA} total chip current: Driving 8 LEDs at 20 mA20\text{ mA} each draws 160 mA160\text{ mA}, exceeding the 70 mA70\text{ mA} VCCV_{CC} package limit and damaging the IC. Use current-limiting resistors (≥220 Ω\ge 220\ \Omega per LED at 5V).

Notes

  • 74HC595 vs TPIC6B595: The TPIC6B595 is a power MOSFET variant capable of sinking up to 150 mA150\text{ mA} per channel at 50V for high-current solenoid/relay loads.

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