Overview

The 74HC283 (SN74HC283N) is a 4-bit binary full adder IC with fast internal look-ahead carry generation, manufactured by Texas Instruments, Nexperia, and ON Semiconductor. It adds two 4-bit binary words (A1A4A_1 \dots A_4 and B1B4B_1 \dots B_4) plus an incoming carry bit (C0C_0), producing a 4-bit binary sum (S1S4S_1 \dots S_4) and a final carry-out bit (C4C_4).

Operating from 2.0V to 6.0V DC, the 74HC283 is a staple logic component in computer architecture educational kits, ALU (Arithmetic Logic Unit) designs, breadboard computers (such as SAP-1 / Ben Eater 8-bit computer builds), and high-speed hardware accumulator circuits.

Quick reference

Supply Voltage (VCC)2.0 V to 6.0 V DC
Logic FamilyHigh-Speed CMOS (74HC) / TTL Compatible (74HCT)
Operand Inputs4-Bit AA (A1,A2,A3,A4A_1, A_2, A_3, A_4) & 4-Bit BB (B1,B2,B3,B4B_1, B_2, B_3, B_4)
Carry ControlCarry In (C0C_0) and Carry Out (C4C_4)
Sum Outputs4-Bit Sum (S1,S2,S3,S4S_1, S_2, S_3, S_4)
Propagation Delay16 ns16\text{ ns} typical at VCC=4.5VVCC = 4.5\text{V}
Package16-pin DIP / SOIC-16 / TSSOP-16

Pinout (DIP-16 Package)

text
             ┌───┴───┐
          S2 1│ 1   16│ VCC (+2V to +6V)
          B2 2│       │15 B3
          A2 3│ 74HC  │14 A3
          S1 4│  283  │13 S3
          A1 5│       │12 A4
          B1 6│       │11 B4
          C0 7│       │10 S4
         GND 8│       │9  C4 (Carry Out)
             └───────┘
PinNameTypeDescription
1S2OutputSum Bit 2 Output
2B2InputOperand B Bit 2 Input
3A2InputOperand A Bit 2 Input
4S1OutputSum Bit 1 Output (LSB Sum)
5A1InputOperand A Bit 1 Input (LSB A)
6B1InputOperand B Bit 1 Input (LSB B)
7C0InputCarry In (LSB Carry Input)
8GNDPowerGround reference (0 V)
9C4OutputCarry Out (MSB Carry Output — Connect to C0C_0 of next 74HC283 for 8-bit adding)
10S4OutputSum Bit 4 Output (MSB Sum)
11B4InputOperand B Bit 4 Input (MSB B)
12A4InputOperand A Bit 4 Input (MSB A)
13S3OutputSum Bit 3 Output
14A3InputOperand A Bit 3 Input
15B3InputOperand B Bit 3 Input
16VCCPowerPower Supply (+2.0V to +6.0V DC)

Mathematical Operation

The arithmetic addition performed by the chip follows:

(S4S3S2S1)2+16C4=(A4A3A2A1)2+(B4B3B2B1)2+C0(S_4 S_3 S_2 S_1)_2 + 16 \cdot C_4 = (A_4 A_3 A_2 A_1)_2 + (B_4 B_3 B_2 B_1)_2 + C_0

For an 8-bit adder, cascade two 74HC283 chips by connecting C4C_4 of the lower nibble adder to C0C_0 of the upper nibble adder.

Subtraction Mode (A - B via Two's Complement)

Invert all BB inputs (B1B4B_1 \dots B_4) using XOR gates (74HC86) driven by a SUB control line, and set C0=1C_0 = 1. The adder computes A+Bˉ+1=ABA + \bar{B} + 1 = A - B.

Common mistakes

  • Leaving Carry In (C0C_0, Pin 7) floating: For standard addition, C0C_0 must be tied directly to GND. Leaving C0C_0 floating produces incorrect LSB additions.
  • Conflating pinout with older 7483 / 74LS83 chips: The 74HC283 has a different, optimized pinout arrangement compared to the legacy 7483/74LS83.

Notes

  • 74HC283 vs 74LS283: 74HC283 is CMOS (low power, 2V-6V supply); 74LS283 is TTL (5V supply only, higher power consumption).

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