Overview

The 74HC02 (SN74HC02) is a quad 2-input NOR gate IC manufactured using high-speed silicon-gate CMOS technology. Containing four independent 2-input NOR gates in a 14-pin DIP/SOIC package, it performs the Boolean function Y=A+BY = \overline{A + B} in positive logic.

Like the NAND gate, the NOR gate is a universal logic gate capable of implementing any Boolean function without other gate types. Operating across a supply voltage range of 2.0V to 6.0V DC, the 74HC02 features low CMOS power consumption and high switching speeds (7 ns7\text{ ns} propagation delay).

Quick reference

Supply Voltage (VCC)2.0 V to 6.0 V DC
Logic FamilyHigh-Speed CMOS (74HC) / TTL Compatible (74HCT)
Independent Gates4 (Quad 2-Input NOR)
Propagation Delay7 ns7\text{ ns} typical at VCC=5.0VVCC = 5.0\text{V}
Output Drive Current±5.2 mA\pm 5.2\text{ mA} at VCC=4.5VVCC = 4.5\text{V}
Package14-pin DIP / SOIC-14 / TSSOP-14

Pinout (DIP-14 Package)

text
             ┌───┴───┐
         1/Y 1│ 1   14│ VCC
          1A 2│       │13 4/Y
          1B 3│       │12 4B
         2/Y 4│ 74HC02│11 4A
          2A 5│       │10 3/Y
          2B 6│       │9  3B
         GND 7│       │8  3A
             └───────┘

Important Pinout Note: On 74HC02, outputs are on Pins 1, 4, 10, 13, and inputs are on Pins 2/3, 5/6, 8/9, 11/12 (unlike 74HC00/08/32 where inputs are on Pins 1/2)!

PinNameDescription
11/YGate 1 Output (1Y=1A+1B1Y = \overline{1A + 1B})
21AGate 1 Input A
31BGate 1 Input B
42/YGate 2 Output (2Y=2A+2B2Y = \overline{2A + 2B})
52AGate 2 Input A
62BGate 2 Input B
7GNDGround reference (0 V)
83AGate 3 Input A
93BGate 3 Input B
103/YGate 3 Output (3Y=3A+3B3Y = \overline{3A + 3B})
114AGate 4 Input A
124BGate 4 Input B
134/YGate 4 Output (4Y=4A+4B4Y = \overline{4A + 4B})
14VCCPower supply voltage (+2.0V to +6.0V DC)

Function & Truth Table (Per Gate)

Input AInput BOutput Y
Low (LL)Low (LL)High (HH)
Low (LL)High (HH)Low (LL)
High (HH)Low (LL)Low (LL)
High (HH)High (HH)Low (LL)

Specifications

ParameterSymbolMinTypMaxUnitConditions
Supply VoltageVCCV_{CC}2.05.06.0VDC
High-Level Input VoltageVIHV_{IH}3.15VVCC=4.5VV_{CC} = 4.5\text{V}
Low-Level Input VoltageVILV_{IL}1.35VVCC=4.5VV_{CC} = 4.5\text{V}
Propagation Delay (A,BYA,B \rightarrow Y)tPDt_{PD}715nsVCC=4.5V,CL=50pFV_{CC} = 4.5\text{V}, C_L = 50\text{pF}
Output Drive CurrentIOUTI_{OUT}±5.2\pm 5.2mAVCC=4.5VV_{CC} = 4.5\text{V}
Quiescent Supply CurrentICCI_{CC}2.0µAVIN=VCC or GNDV_{IN} = V_{CC}\text{ or GND}

Typical Applications

Active-HIGH SR Latch (Flip-Flop)

Cross-coupling two NOR gates creates an active-HIGH Set-Reset (SS-RR) latch.

text
  Reset (R) ────► [Pin 2: 1A]   [Pin 1: 1/Y] ──┬──► Output Q
                       │                       │
                       └───[Cross Feedback]────┼──┐
                                               │  │
  Set (S) ──────► [Pin 6: 2B]   [Pin 4: 2/Y] ──┴──┼──► Output /Q
                       │                          │
                       └──────────────────────────┘

Common mistakes

  • Assuming Pin 1 is Input A: On 74HC02, Pin 1 is the Gate 1 Output, while Pins 2 and 3 are inputs. Applying a 5V signal directly to Pin 1 short-circuits the output driver.
  • Confusing 74HC02 pinout with CD4001 pinout: 74HC02 has outputs on Pins 1, 4, 10, 13; CD4001 has outputs on Pins 3, 4, 10, 11.
  • Leaving unused inputs floating: Tie all unused gate inputs (e.g. Pins 5, 6, 8, 9, 11, 12) to GND or VCCV_{CC}.

Notes

  • 74HC02 vs CD4001: 74HC02 operates up to 6V DC with 7ns delay; CD4001 operates up to 18V DC with 60ns delay.

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