Overview

The MFRC522 is a highly integrated 13.56 MHz contactless communication card reader/writer IC designed by NXP Semiconductors, most commonly sold on low-cost RC522 breakout modules. It provides full support for ISO/IEC 14443 A protocol standards and MIFARE card families (including MIFARE Mini, 1K, 4K, Ultralight, and DESFire).

The chip directly drives an onboard PCB loop antenna using high-frequency magnetic field modulation (13.56 MHz) with no external active driver circuitry required. It communicates with nearby passive RFID tags and smart cards via electromagnetic induction, exchanging framed commands and responses.

Host microcontrollers communicate with the module primarily over SPI (up to 10 Mbit/s), though I2C (up to 3.4 Mbit/s) and UART (up to 1228.8 kBd) interface modes are also supported by the underlying silicon. The module features an internal 64-byte FIFO buffer, hardware CRC engine, and programmable interrupt capabilities to offload timing-critical RFID transactions from the host MCU.

Note

NXP lists the underlying MFRC522 silicon as Not Recommended for New Designs; the suggested replacement family is the CLRC663 Plus (CLRC66303HN). However, the low-cost RC522 module remains widely used across educational and maker projects.

Quick reference

Operating voltage2.5 V – 3.6 V (3.3 V nominal)
Logic level3.3 V (not 5 V tolerant)
InterfaceSPI (default on RC522 module), I2C, UART
Default addressSPI: Active-low Chip Select (SDA/NSS); I2C: 0x28 (configurable via EA/D1D7)
Current draw13 mA – 26 mA (operating), 10 µA (hard power-down)
Key spec13.56 MHz ISO/IEC 14443 A & MIFARE support with ~50 mm read range

Pinout

PinNameTypeDescription
1SDA / NSS / CSBusSPI Chip Select (active low) / I2C Data / UART address input
2SCKClockSPI Serial Clock input
3MOSIDigital I/OSPI Master Out Slave In data input
4MISODigital I/OSPI Master In Slave Out data output
5IRQDigital I/OInterrupt Request output (active low or high, programmable; typically unconnected)
6GNDPowerGround (0 V) reference
7RSTDigital I/OReset and Power-Down input (active low; pull high for normal operation)
83.3VPowerPower supply input (2.5 V to 3.6 V DC)
Tip

For direct IC integration in HVQFN32 package, pins 25–31 are multiplexed between SPI, I2C, and UART modes depending on the I2C and EA logic levels latched at reset.

Specifications

ParameterMinTypMaxUnitConditions
Supply voltage (VCC)2.53.33.6VNormal operation
Operating current132026mARF field active, 13.56 MHz
Idle current101315mACommandReg = Idle mode
Hard power-down current1.05.0µANRSTPD = 0 V
Soft power-down current10.0µAPowerDown bit set in CommandReg
Carrier frequency13.56MHzCrystal frequency = 27.12 MHz
SPI clock frequency010Mbit/sSPI mode
Operating temperature−25+25+85°CAmbient temperature
Read distance05080mmDependent on antenna geometry & card tuning

Communication

  • Protocol: SPI Mode 0 (CPOL = 0, CPHA = 0), MSB first. Also supports I2C (up to 3.4 Mbit/s) and UART (up to 1228.8 kBd) when enabled on the IC.
  • Max clock: 10 Mbit/s (SPI).
  • Frame format: Each SPI transfer consists of an address byte followed by one or more data bytes:
    • Address byte format:
      • Bit 7 (MSB): Read / Write flag (1 = Read, 0 = Write).
      • Bits 6:1: Register address (6-bit offset 0x000x3F).
      • Bit 0 (LSB): Reserved, must always be 0.
    • SPI Write framing: (Address << 1) & 0x7E followed by data byte(s).
    • SPI Read framing: (Address << 1) | 0x80 followed by clocking dummy bytes to read response byte(s).

Register map

AddressRegisterAccessResetDescription
0x01CommandRegR/W0x20Starts/stops command execution and soft power-down
0x02ComIEnRegR/W0x80Interrupt enable control bits for communication events
0x04ComIrqRegR/W0x14Communication interrupt request flags
0x06ErrorRegR0x00Error status flags for last executed command
0x07Status1RegR0x21CRC and FIFO status flags
0x08Status2RegR/W0x00Receiver and crypto (MIFARE) status flags
0x09FIFODataRegR/W0x0064-byte FIFO buffer input/output port
0x0AFIFOLevelRegR/W0x00Number of bytes currently stored in FIFO
0x0DBitFramingRegR/W0x00Bit-oriented frame adjustment (last bits transmission)
0x0ECollRegR/W0x80Bit position of first detected collision
0x11ModeRegR/W0x3BGeneral mode control (CRC preset, polarity)
0x12TxModeRegR/W0x00Transmitter speed and framing settings
0x13RxModeRegR/W0x00Receiver speed and framing settings
0x14TxControlRegR/W0x80Controls RF output drivers TX1 and TX2
0x15TxASKRegR/W0x00Forces 100% ASK modulation
0x26RFCfgRegR/W0x48Configures receiver gain (RxGain)
0x2ATModeRegR/W0x00Timer prescaler upper bits and auto-timer control
0x2BTPrescalerRegR/W0x00Timer prescaler lower bits
0x2CTReloadRegHR/W0x00Timer reload value (High byte)
0x2DTReloadRegLR/W0x00Timer reload value (Low byte)
0x37VersionRegR0x91/0x92Silicon version identifier (0x91 = v1.0, 0x92 = v2.0)

0x01CommandReg

Bit(s)FieldAccessResetDescription
7ReservedR0Reserved
6PowerDownR/W0Soft power-down mode (1 = powered down, oscillator off)
5RcvOffR/W1Analog receiver status (1 = receiver off)
3:0CommandR/W0000Command code (0x00: Idle, 0x01: Mem, 0x02: Generate RandomID, 0x03: CalcCRC, 0x04: Transmit, 0x0C: Transceive, 0x0E: MFAuthent, 0x0F: SoftReset)

0x14TxControlReg

Bit(s)FieldAccessResetDescription
7:2ReservedR/W100000Reserved
1Tx2RFEnR/W0Enables TX2 antenna output driver (1 = 13.56 MHz carrier on)
0Tx1RFEnR/W0Enables TX1 antenna output driver (1 = 13.56 MHz carrier on)

0x26RFCfgReg

Bit(s)FieldAccessResetDescription
7ReservedR/W0Reserved
6:4RxGainR/W100Receiver gain factor (011: 33 dB, 100: 38 dB default, 110: 43 dB, 111: 48 dB max)
3:0ReservedR/W1000Reserved

0x37VersionReg

Bit(s)FieldAccessResetDescription
7:4ChipTypeR1001Always 0x9 for MFRC522 family
3:0VersionR0001 / 0010Silicon revision (0x1 = v1.0 [0x91], 0x2 = v2.0 [0x92])

Wiring

Module (RC522)MCU (e.g. Arduino Uno)Notes
3.3V3.3VNever connect to 5V power supply!
RSTD9Configurable reset pin
GNDGNDCommon ground
IRQUnconnected (optional interrupt pin)
MISOD12SPI Master In Slave Out
MOSID11SPI Master Out Slave In (via level shifter if 5V MCU)
SCKD13SPI Serial Clock (via level shifter if 5V MCU)
SDA (SS)D10SPI Chip Select (via level shifter if 5V MCU)
Warning

Not 5 V tolerant! The MFRC522 operates strictly at 3.3 V logic. When connecting to 5 V microcontrollers (such as Arduino Uno or Nano), use active logic level shifters or resistor voltage dividers (e.g. 1 kΩ / 2 kΩ) on SCK, MOSI, SDA, and RST lines. The MISO output line can be connected directly to 5 V MCUs because 3.3 V high logic meets the 5 V MCU threshold.

Example

cpp
#include <SPI.h>
#include <MFRC522.h>

#define RST_PIN  9
#define SS_PIN   10

MFRC522 mfrc522(SS_PIN, RST_PIN); // Create MFRC522 instance

void setup() {
  Serial.begin(9600);
  while (!Serial);
  
  SPI.begin();           // Init SPI bus
  mfrc522.PCD_Init();    // Init MFRC522 reader
  
  // Verify SPI communication by reading VersionReg
  byte v = mfrc522.PCD_ReadRegister(mfrc522.VersionReg);
  Serial.print(F("MFRC522 Version: 0x"));
  Serial.println(v, HEX);
}

void loop() {
  // Look for new RFID card
  if (!mfrc522.PICC_IsNewCardPresent()) return;
  
  // Select one of the cards
  if (!mfrc522.PICC_ReadCardSerial()) return;
  
  // Print UID to Serial Monitor
  Serial.print(F("Card UID:"));
  for (byte i = 0; i < mfrc522.uid.size; i++) {
    Serial.print(mfrc522.uid.uidByte[i] < 0x10 ? " 0" : " ");
    Serial.print(mfrc522.uid.uidByte[i], HEX);
  }
  Serial.println();
  
  // Halt PICC and stop crypto on PCD
  mfrc522.PICC_HaltA();
  mfrc522.PCD_StopCrypto1();
}

Common mistakes

  • If reader fails to initialize (VersionReg returns 0x00 or 0xFF): Check wiring, especially 3.3V power and GND. Verify SPI pin assignments (MOSI, MISO, SCK, CS) and ensure power supply voltage is stable.
  • If module dies or behaves erratically after connecting to Arduino Uno: Check logic levels. Direct 5 V GPIO signals on SCK, MOSI, SDA, or RST can degrade or burn out the MFRC522 inputs. Add level shifters.
  • If card detection range is short (< 10 mm) or intermittent: Check antenna tuning and receiver gain. Verify RFCfgReg (RxGain) is set to 0x48 (38 dB) or 0x70 (48 dB), and ensure no metal objects or noise sources are near the PCB antenna.
  • If SPI bus conflicts occur when using multiple devices: Check MISO output. Some cheap RC522 clone modules fail to properly tri-state MISO when SDA/CS is high. Add a tri-state buffer or dedicated SPI bus.
  • If MIFARE read/write operations fail after card detection: Check authentication sequence. MIFARE Classic cards require executing PCD_Authenticate with Key A or Key B (default 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) before accessing data blocks.

Notes

  • Silicon Revisions: Revision 1.0 (MFRC52201HN1, returns 0x91 in VersionReg) vs Revision 2.0 (MFRC52202HN1, returns 0x92 in VersionReg). Revision 2.0 improves RF receiver stability and fixes CRC calculation when RxMultiple is set.
  • NRND Notice: NXP lists MFRC522 as Not Recommended for New Designs. For new commercial designs, NXP recommends the CLRC663 Plus family (CLRC66303HN).

Assets & downloads

Revisions

  • v2.0published2026-07-25
  • v1.0deprecated