Overview

The NCP81074 (available in NCP81074A split-output and NCP81074B single-output configurations) is a single-channel, ultra-high-speed low-side MOSFET and GaN gate driver manufactured by ON Semiconductor (onsemi). Engineered to source and sink up to $\pm 10\text{ A}$ peak current, it drives large capacitive gate loads with industry-leading rise and fall times of just $4\text{ ns}$ into a $1.8\text{ nF}$ load.

Operating from a wide supply range of $4.5\text{ V}$ to $20.0\text{ V}$, the NCP81074 drastically minimizes switching transition losses ($E_{on}$ and $E_{off}$) in high-frequency power electronics applications, including synchronous buck converters, secondary synchronous rectifiers, active clamp flybacks, high-speed laser diode drivers, and class-D amplifiers.

Quick reference

Pin Configuration (SOIC-8 Package)

NCP81074A (Split Output with Enable)

        ┌──────────────┐
     EN ─│ 1          8 │─ OUTH (Source)
    IN+ ─│ 2          7 │─ OUTL (Sink)
    GND ─│ 3          6 │─ VDD
     NC ─│ 4          5 │─ NC
        └──────────────┘

NCP81074B (Dual Input Differential with Single Output)

        ┌──────────────┐
    IN+ ─│ 1          8 │─ OUT
    IN- ─│ 2          7 │─ OUT
    GND ─│ 3          6 │─ VDD
     NC ─│ 4          5 │─ NC
        └──────────────┘

Control Logic Truth Tables

NCP81074A (Split Output with Enable)

NCP81074B (Dual Inverting/Non-Inverting Inputs)

Specifications

Split Output Drive Topology (NCP81074A)

The split output (OUTH and OUTL) allows independent tuning of the MOSFET's turn-on and turn-off speeds without adding a parallel reverse diode across a single gate resistor:

        NCP81074A
     ┌──────────────┐
     │         OUTH ├───[ R_G(ON) 10Ω ]───┐
     │              │                     ├───── Gate of Power MOSFET
     │         OUTL ├───[ R_G(OFF) 2.2Ω ]─┘
     └──────────────┘

• $R_{G(ON)}$ (e.g. $10\ \Omega$): Sets a controlled turn-on $dV/dt$ to minimize EMI and switch-node ringing.
• $R_{G(OFF)}$ (e.g. $2.2\ \Omega$): Provides an aggressive, ultra-low impedance discharge path to eliminate parasitic Miller-effect induced shoot-through.

Common mistakes

• Inadequate high-frequency decoupling on VDD: A 10A current spike drawn in $4\text{ ns}$ will cause huge voltage droop on $V_{DD}$ without localized decoupling. Place at least one $1.0\ \mu\text{F} \dots 4.7\ \mu\text{F}$ low-ESR ceramic capacitor (X7R) directly between Pin 6 (VDD) and Pin 3 (GND) within $2\text{ mm}$ of the IC package.
• Excessive gate trace inductance: Long PCB traces between the driver and the MOSFET gate introduce parasitic inductance that rings severely with the MOSFET input capacitance ($C_{iss}$). Keep gate traces under $10\text{ mm}$ in length and route over an unbroken ground reference plane.

Notes

• Version Differences: Choose NCP81074A if independent turn-on/turn-off resistor control is desired; choose NCP81074B if inverting input control or dual complementary PWM signals are required.